1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a method for oxidizing trench sidewalls which reduces crystallographic orientation dependence.
2. Description of the Related Art
Semiconductor devices employ silicon substrates on which to fabricate electronic devices. The structures fabricated on the substrate may include trenches for isolation regions, deep trenches for the formation of capacitor electrodes or other exposed vertical sidewalls of the substrate.
Sidewalls of the substrate may be oxidized to provide insulating layers. For silicon substrates, thermal oxidation may be employed to provide this insulation. The thermal oxidation rate on the vertical sidewalls of trenches depends on the silicon""s crystal orientation of the trench sidewall. Thus, local oxidation of silicon (LOCOS oxidation) and gate oxidation processes for vertical transistors suffer from oxide thickness variations.
Referring to FIG. 1, a top view of a substrate 8 is shown having a trench 12 formed therein which has a thermally grown oxide layer 10 formed therein. Thermal oxidation 10 in trenches 12 leads to strong thickness variations due to the crystal plane orientation dependence of the oxidation. Typical thickness variations for thin oxides are approximately 40% for 900xc2x0 C. dry oxidation processes between the (100) crystal plane 14 and the (110) crystal plane 16. For thick thermal oxidations, like the LOCOS oxidation, the thickness differences are even larger due to stress effects. If transistors have to be built at the trench sidewall, the oxide thickness variation leads to locally varying transistor properties and to weak points in the oxide during reliability stressing.
Therefore, a need exists for a method of reducing oxidation variations due to orientation dependent effects for thermal oxides formed for semiconductor devices.
A method for growing a dielectric layer on a substrate, in accordance with the present invention, includes the steps of providing a substrate having at least two crystallographic planes which experience different dielectric layer growth rates due to the at least two crystallographic planes. A first dielectric layer is grown on the at least two crystallographic planes such that the first dielectric layer has a first thickness on a first crystallographic plane and a second thickness on a second crystallographic plane. The first thickness is thicker than the second thickness for the first dielectric layer. Dopants are implanted through the first dielectric layer. A greater number of dopants are implanted in the substrate through the second thickness than through the first thickness of the first dielectric layer The first dielectric layer is then removed. A second dielectric layer is grown at a same location as the removed first dielectric layer. The second dielectric layer has a first thickness on a first crystallographic plane and a second thickness on a second crystallographic plane. The first thickness and the second thickness of the second dielectric layer are closer in thickness than the first thickness and the second thickness of the first dielectric layer due to the implantation of the dopants.
In other methods, the step of implanting may include the step of implanting dopants by employing one of ion implantation and plasma ion implantation. The substrate preferably includes mono-crystalline silicon and the first and second dielectric layer may include silicon oxide. The step of growing the first dielectric layer may include exposing the substrate to an oxygen ambient environment at a temperature greater than about 700 degrees C. The step of growing the second dielectric layer may include exposing the substrate to an oxygen ambient environment at a temperature greater than about 800 degrees C. The dopants may include one of halogens, oxygen, silicon and noble gases. The first thickness and the second thickness of the second dielectric layer may be substantially equal. The step of preventing dopants from penetrating through the first thickness of the first dielectric layer may also be included.
A method for growing an oxide layer on a substrate, in accordance with the present invention, includes providing a silicon substrate having a trench etched therein. The trench has sidewalls including at least two crystallographic planes which experience different dielectric layer growth. A sacrificial oxide layer is thermally grown on the at least two crystallographic planes such that the sacrificial oxide layer has a first thickness on a first crystallographic plane and a second thickness on a second crystallographic plane, wherein the first thickness is thicker than the second thickness. Dopants are implanted through the sacrificial oxide layer such that a greater number of dopants are implanted in the substrate through the second thickness than through the first thickness of the sacrificial oxide layer. The sacrificial oxide layer is removed, and an oxide dielectric layer is thermally grown in a location of the removed first dielectric layer such that the oxide dielectric layer grows faster on the second crystallographic plane than on the first crystallographic plane. The first thickness and the second thickness of the oxide dielectric layer are closer in thickness than the first thickness and the second thickness of the sacrificial oxide layer.
A method for growing an oxide layer on a substrate to prevent crystallographic orientation dependent thicknesses, in accordance with the invention, includes the steps of forming a hard mask on a top surface of a silicon substrate, patterning the hard mask and etching a trench in the substrate, the trench having sidewalls including at least two crystallographic planes which experience different dielectric layer growth, thermally growing a sacrificial oxide layer on the at least two crystallographic planes such that the sacrificial oxide layer has a first thickness on a first crystallographic plane and a second thickness on a second crystallographic plane, wherein the first thickness is thicker than the second thickness, implanting halogen dopants through the sacrificial oxide layer such that a greater number of dopants are implanted in the substrate through the second thickness than through the first thickness of the sacrificial oxide layer, the halogen dopants for promoting oxide growth, removing the sacrificial oxide layer, and thermally growing a oxide dielectric layer in a location of the removed first dielectric layer such that the oxide dielectric layer grows faster on the second crystallographic plane than on the first crystallographic plane due to the presence of the halogen dopants, such that the first thickness and the second thickness of the oxide dielectric layer are closer in thickness than the first thickness and the second thickness of the sacrificial oxide layer.
In other methods, the step of implanting may include the step of implanting dopants by employing angled ion implantation to implant dopants below a top surface of the substrate. The angled ion implantation may include directing dopants at an angle of between 10 and 75 degrees relative to a surface normal of the top surface of the substrate. The step of implanting may include the step of rotating the substrate to implant dopants on all sidewalls of the trench. The step of implanting may include the step of implanting dopants by employing plasma ion implantation to implant dopants in the substrate.
In still other methods, the step of growing the sacrificial oxide layer may include exposing the substrate to an oxygen ambient environment at a temperature greater than about 700 degrees C. The step of growing the oxide dielectric layer may include exposing the substrate to an oxygen ambient environment at a temperature greater than about 800 degrees C. The dopants may include halogens, oxygen, silicon and/or noble gases. The first thickness and the second thickness of the oxide dielectric layer may be substantially equal. The method may include the step of preventing dopants from penetrating through the first thickness of the sacrificial oxide layer. The oxide dielectric layer may include a trench collar employed in deep trench capacitors. The oxide dielectric layer may include a gate oxide for vertical transistors.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.